Electronic transport studies of a two-phase gallium nitride nanowire are explored. Current-voltage measurements are taken of gallium nitride based three terminal field effect transistors fabricated via electron beam lithography. The measurements indicate a working field effect transistor utilizing a global back gate configuration. Very high current levels within the nanowire are reported. Direct transport measurements are also taken via two nanomanipulator probes. High current levels in this experiment are also observed. Scanning Probe Recognition Microscopy is used to detect the contact pad and nanowire radial boundary, and a nanowire auto-focus experiment is reported.
Over the past decade nanowires and nanotubes made from a wide variety of materials have demonstrated extraordinary electronic, mechanical and chemical characteristics. Gallium nitride (GaN) nanowires are particularly promising due to an inherently wide bandgap coupled with structurally induced electronic and optical confinement  . Gallium nitride-based nanocircuits have recently been shown to be viable for wide range of electronic and optical applications. GaN nanowire field effect transistors [2, 3, 4] and logic devices  have shown desired characteristics of high transconductance and good switching, and room temperature UV lasing has been reported for GaN nanowire systems [6, 7] as well as good field emission properties  .
Understanding the interactions of gallium nitride nanowires within a nanocircuit architecture is critically important to the maximizing the potential of the GaN nanowire building block. In particular details of the electronic transport and carrier injection require fundamental elucidation. We will present details of our recent investigations of electronic transport and carrier injection.
Ii. Materials And Methods
The~50-100 nm gallium nitride nanowires were grown in a direct reaction of metal gallium vapor with flowing ammonia at 850-900°C without a catalyst as reported in Reference  . These had a two-phase coaxial zinc-blende/wurtzite structure, shown in Figure 1 and reported in Reference  . A field effect transistor design using a GaN nanowire as an n-type semiconducting channel was used in the experiment (GaNFET). The nanowires were dispersed on a highly doped ptype silicon substrate covered with a 150 nm dielectric layer of thermally grown silicon dioxide. The GaNFET source and drain contacts were patterned using electron beam lithography, with Ti/Au used for the conducting source and drain material. The backside of the wafer was stripped of silicon dioxide using hydrofluoric acid and Ti/Au was evaporated to form the global back gate.
Electronic transport characteristics were measured in twopoint and four-point probe configurations using a Keithley 4200-SCS ultra low noise electronic characterization system and a Keithley-Zyvex KZ100 nanoprobing system, in which specially sharpened ~30 nm radius tungsten nanoprobes are coupled with the 4200-SCS and experiments are performed under direct SEM observation. These experiments were carried out at the corporate laboratories of Keithley Instruments, (Cleveland Ohio), and Zyvex Corporation,
Iii. Nanocircuit Electronic Transport
MEASUREMENTS Current-voltage measurements were taken at Keithley Labs on a Keithley 4200-SCS which offers very low noise and low current measurements. The Keithley 4200-SCS is uniquely suited for this application because high levels of noise can arise while analyzing the GaNFETs. Measurements indicate this FET has a good on-off ratio and is capable of handling high current. Currents measured in these devices approached 30µA, which is similar to findings from other groups [12, 13] , is very high considering the nanowire dimensions. The current density can thus be approximated as ~2.4mA*µm -2 . Although the nanowire is capable of very high current densities, the gate voltages needed to achieve this are somewhat above accepted levels. A gate voltage step of -30V to 30V was needed to clearly show current change based on gate voltage modulation. These gate levels, however, are not feasible in most devices.
Other discrepancies include unpredictability of the device at negative drain-source voltages, where the gate-source voltage variation does not seem to affect the drain current as much. The reason for this anomaly is unknown at this time, but is being investigated further.
Iv. Nanowire Electronic Transport Measurements
Further two-point and point-point probe measurements were performed in the Keithley-Zyvex KZ100 nanoprobing system under direct SEM observation. The nanoprobe arrangement for the four-point measurements is shown in Figure 3 (a). Placement of a probe tip resulted in the nanowire break. The probes labeled 2 and 3 were lifted out of contact with the nanowire and the probe labeled 1 was placed in direct contact with the cleaved open end as shown in Figure 3(b) . The probe labeled 4 remained on the gold contact pad as shown in Figure 3 (a).
The current density to breakdown was then investigated. The results confirmed the high current capacity previously discussed. In a typical example 10µA of current was achieved, as shown in Figure 3 (c). Electrical breakdown with pull apart in the middle of the nanowire occurred at greater than 50µA. The gold contact pad near probe 4 did not display any sign of local heating. . In SPRM, we give the Scanning Probe Microscope system itself the power to return to a specific nanoscale feature of interest through feature recognition coupled with adaptive scan plan generation and implementation. It is a recognition-driven and learning approach, made possible through combining Scanning Probe Microscope piezoelectric implementation with on-line image processing and dynamically adaptive learning algorithms. The human operator interaction is now focused on the decisionmaking level, rather than the execution level. SPRM has been implemented within our group in the main atomic force and scanning tunneling modes. The SPRM experiments are performed on a specially adapted Multimode Nanoscope IIIA (Veeco Instruments) in ambient air. For the nanociruits investigation, several aspects of the GaNFETs are currently under investigation, which require the ability to autofocus the scan path to proceeed from the conducting contact pad onto the semiconducting GaN nanowire, while avoiding the insulating oxide layer.