Electron Transport in Zinc-blende Wurtzite Biphasic Gallium Nitride Nanowires and GaNFETs


Two-point and four-point probe electrical measurements of a biphasic gallium nitride nanowire and current–voltage characteristics of a gallium nitride nanowire based field effect transistor are reported. The biphasic gallium nitride nanowires have a crystalline homostructure consisting of wurtzite and zinc-blende phases that grow simultaneously in the longitudinal direction. There is a sharp transition of one to a few atomic layers between each phase. All measurements showed high current densities. Evidence of single-phase current transport in the biphasic nanowire structure is discussed.

1. Introduction

Gallium nitride nanowires have recently attracted attention due to their desirable electronic and optical characteristics. Gallium nitride (GaN) is a semiconductor with a wide, direct bandgap, 3.299 eV in bulk zinc-blende, 3.437 eV in bulk wurtzite [1] , and is inherently n-type with a doping concentration around 10 18 cm −3 due to nitrogen vacancies [2, 3] . GaN nanowires have been used in a variety of devices. GaN nanowire field effect transistors [4] have demonstrated high transconductance and good switching behavior. Complementary logic [5] and optical [6] devices have been fabricated using p-type dopants in nanowire growth [7] , further enhancing the versatility of these nanowires in devices.

The electronic transport characteristics between metal electrodes and GaN nanowires in such devices, however, are of great importance when maximizing device performance, as these junctions play a critical role in device behavior. Carrier injection into nanowires has yet to be completely explained at a fundamental level, which impedes the effectiveness of device design. Biphasic GaN nanowires also represent a new class of nanowire system and have yet to be investigated for their electronic characteristics [8, 9] . In this nanowire, with zincblende and wurtzite phases growing together simultaneously, electron transport may be different in relation to single phase nanowires.

2. Growth Method And Nanowire Structure

Figure 1. TEM images of a GaN nanowire. (a) Nanowire width where each phase can be seen and is indicated accordingly. The inset is an SEM showing the triangular cross section of the nanowire. (b) An HRTEM close up image of the phase transition taken from the area indicated in (a). It is clearly seen to be only a few atomic layers wide.

The GaN nanowires used in this study have a biphasic crystalline homostructure consisting of both zinc-blende and wurtzite crystalline phases that grow simultaneously in the longitudinal direction [8] [9] [10] . They were grown without a catalyst in a direct reaction of gallium and ammonia in a quartz tube furnace at temperatures between 825 and 850 • C, pressures of ∼15 mTorr and ammonia flow rates of ∼150 sccm [11, 12] . The nanowire crystal structure was determined via selected area electron diffraction patterns (SAED), analytical energy dispersive x-ray spectroscopy (EDS), electron energy loss spectroscopy (EELS), and postprocessed fast Fourier transforms (FFTs) of high-resolution transmission electron microscopy (HRTEM, JEOL 2200FS) images. These studies showed that the nanowire coaxial biphasic homostructure spans the entire length of the nanowire, with sharp one-to three-atomic-layer phase transitions, as shown in figures 1(a) and (b). Typical nanowire widths ranged from 60 to 120 nm. The wurtzite (WZ) phase had widths between 30 and 60 nm and the zinc-blende (ZB) phase had widths between 20 and 60 nm. The nanowires have a triangular cross section as observed in multiple field-emission scanning electron microscopy (FESEM, Hitachi S-4700II) images, figure 1(a) inset, and coincide with the observed growth direction of [011] ZB and [1120] WZ and with investigations reported by other groups [13, 14] . Nanowire lengths can reach several hundred microns.

3.1. Ganfet Fabrication

A highly doped p-type silicon wafer (5 m cm) was used as the GaN field effect transistor (GaNFET) substrate with a 100 nm layer of thermally grown silicon dioxide as the gate dielectric. The backside of the wafer was stripped of silicon dioxide using diluted HF and Ti/Au (10/70 nm, Edward Auto306) was thermally evaporated to form the global back gate of the GaNFET [15] . GaN nanowires were then dispersed from an ethanol solution onto the substrate, and source and drain contacts were patterned via electron beam lithography (JEOL 840A SEM). Ti/Au (10/30 nm) was then thermally evaporated for the conducting source and drain contacts after being exposed to a 100 W oxygen plasma (March Instruments PX-250) for 30 s to remove any electron beam resist residue. Subsequent metal lift-off was performed in acetone.

3.2. Experiments

In the first experiments, electronic characteristics of a GaN nanowire were investigated using two-point and fourpoint probe techniques. A GaNFET was used as the test sample in these experiments. The back gate was not used. The experiments were performed using a Zyvex KZ100 Nanomanipulator system. The KZ100 is a hybrid instrument interfacing the Keithley 4200-SCS and the Zyvex S100 Nanomanipulator. It is equipped with NanoEffector ® probes, which are electrochemically etched tungsten polycrystalline wires with a nominal tip diameter of 50 nm. The KZ100 is capable of probe positioning resolution under 5 nm. This small tip diameter and precise probe positioning allows direct probenanowire connections. The electronic characterization with the KZ100 was performed in a LEO 1530 FESEM at room temperature, allowing real-time, visual inspection with the SEM during the experiments. During measurements the SEM electron beam was turned off, and during visual inspection a low energy beam was used to minimize charge penetration effects. The tungsten probes were electrically cleaned in situ to provide a clean tungsten surface for measurements.

In the four-point probe configuration, the intrinsic nanowire resistance and the Ti/Au-nanowire contact resistances were determined. This was done using floating voltage sense probes that were situated between two current source probes. This configuration is used to eliminate probe contact resistance effects, so that the intrinsic nanowire resistance can be measured. The nanoscale voltage probes are important for four-point probe measurements of single-nanowire systems since they are less invasive than macroscopic probes and contacts. The 4200-SCS is also ideally suited for measurements in such nanoprobing configurations because it can make measurements with very low noise and can have an input impedance greater than 10 16 .